Product Summary

The WT7510 provides protection circuits, power good output (PGO), fault protection latch(FPL_N), and a protection detector function (PDON_N) control. It can minimize external components of switching power supply systems in personal computer. The Over Voltage Detector (OVD)of WT7510 monitors 3.3V, 5V, 12V input voltage level. The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level. When OVD or UVD detect the fault voltage level, the FPL_N is latched HIGH and PGO go low. The latch can be reset by PDON_N goo HIGH. There is 2.4 ms delay time for PDON_N turn off FPL_N.

Parametrics

WT7510 characteristics: (1)tdb1 De-bounce time (PDON_N): min=32mS, typ=38mS, max=61mS; (2)tdleay1 Delay time (PGI to PGO): min=200mS, typ=300mS, max=490mS; (3)tdb2 De-bounce time (PDON_N): min=32mS, typ=38mS, max=61mS; (4)tg De-glitch time: min=63μS, typ=73μS, max=120μS; (5)tdelay2 PDON_N to FPL_N delay time: min=tdb2+2.0mS, typ=tdb2+2.4mS, max=tdb2+3.8mS; (6)On the conditions of FPL_N go low & every time PGI > 1.2V, tdelay3 Internal UVD delay time: min=65mS, typ=75mS, max=122mS.

Features

WT7510 features: (1)The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level; (2)The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level; (3)Both of the power good output (PGO) and fault protection latch(FPL_N) are Open Drain Output; (4)75 ms time delay for UVD; (5)300 ms time delay for PGO; (6)38 ms for PDON_N input signal De-ounce; (7)73 us for internal signal De-litches; (8)2.4 ms time delay for PDON_N turn-off FPL_N.

Diagrams

WT7510 block diagram

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